ASET Colloquium

Next-Generation Security and Architecture

by Prof. Ravishankar K Iyer (University of Illinois at Urbana-Champaign, USA), Prof. Steven Lumetta (University of Illinois at Urbana-Champaign, USA)

Tuesday, November 27, 2012 from to (Asia/Kolkata)
at Colaba Campus ( AG-66 )
Description
The next major innovations in computer science and engineering
are likely to come from "intelligent" deployment of human-centric systems
that must optimally interact with other man-made and natural systems with
a focus on seamless availability of dynamic decision-making capabilities.
The compelling driver is our need to measure, model, communicate and
manage our vast natural and social enterprise. New innovation and creative
approaches are essential to be able to handle problems of scale and
complexity envisioned in this future. This change is being driven by
inexpensive technology deployed at previously unimaginable scales. Our
planet itself, via a vast and varied network, is generating or has the
potential to generate an unprecedented level of information that we were
previously oblivious to and could ignore - we were not able or hear it, to
see it or to capture it. The vast and dynamic information gathered with
these information networks could be analyzed using powerful yet ubiquitous
systems- that are yet to be invented.  In this seminar Professors Iyer and
Lumetta will discuss two projects at the University of Illinois that in
their unique ways address this big data problem.

Professor Iyer will address the issue of protecting a system from
accidental errors and malicious attacks via a new approach based on
"execution under probation"  Via a combination of continuous monitoring
and leveraging Virtual Machines, the method can both identify and
sequester a potential attacker while ensuring that any consequent system
corruption is contained.

Prof. Lumetta will discuss the development of combined software and
hardware coherence protocols in the context of Rigel, a 1000-core
accelerator chip. Dynamically shifting regions of memory between these two
types of coherence both offers a mechanism to support the two models now
dominant in the industry and simplifies the process of parallelizing
applications for many-core execution. 
Organised by Dr. Satyanarayana Bheesette